1. Field of the Invention
This invention relates to majority carrier semiconductor devices and especially relates to MOS transistors.
2. Description of the Prior Art
MOS transistors have traditionally had major application in complex circuits where large current-carrying capability is not a substantial requirement. While power MOS devices have long been contemplated, they were precluded for many years by the inability to achieve a sufficiently high yield to enable fabrication of the large devices required. Due to the yield improvements achieved in complex low-power MOS circuits, MOS power transistors are now viable.
The conventional MOS transistor of the prior art comprises a planar channel region in a confined region at the surface of the semiconductor substrate. An insulated electrode controls the channel conductivity; carriers are introduced into and extracted from the channel by semiconductor regions opposite in conductivity type to the semiconductor substrate at opposite extremities of the channel; current is said to flow from the source to the drain. The channel conductance between the source and drain may be made larger by decreasing the source drain spacing; this decrease is limited by the desired voltage breakdown of the device and/or by the practical effect of uncontrollable spacing variations leading to source-drain shorts as the spacing becomes very small.
The channel conductance or current carrying capability may also be enhanced by increasing the width of the channel in a direction transverse to source-drain current flow. For fixed source-drain spacing, the current-carrying capability is just proportional to the width, and hence the area of the channel. Since the source and drain regions also require substantial area to permit external connection thereto and/or allow current flow therein without engendering unacceptable ohmic drops, the current-carrying ability increases substantially proportionately with area of the whole device for a fixed source-drain spacing.
The cost associated with producing the semiconductor element itself is roughly proportional to the area in any given technology. If some of the devices are non-workable because of random defects having a density d per unit area, then the cost of a good device is proportional to A/(1-dA.) Since the current-carrying capability is proportional to A, the cost goes up faster than the current-carrying capability. Reduced unit costs obtain if the area A for achieving the same function can be reduced utilizing substantially the same technology.